MCQs of DLD

By: Prof. Dr. Fazal Rehman | Last updated: April 30, 2025

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1. : Which of the following gates gives output 1 if and only if at least one input is 1?



2. : For performing the function of a two-input OR gate, what is the minimum number of two-input NAND gates used?



3. : In an application where input signals may ________________, asynchronous circuits are useful.



4. : The time required by a gate or inverter to change its state is called _______________.



5. : The next state in a sequential circuit is determined by ________ and _______.



6. : An SR latch contains ______________.



7. : If a pulse changes from 10% to 90% of its maximum value, the time required is known as _____________.



8. : By using two cascading counters _____________ and ____________, the divide-by-60 counter in a digital clock is implemented.



9. : Which table is not part of the asynchronous analysis procedure?



10. : Digital data can be applied to a gate by a maximum frequency which is called ________________.



11. : The minimum time for which an input signal must be maintained at the input of a flip-flop is called the _____________ of the flip-flop.



12. : For making a transition table, we use _____________.



 

MCQs of Digital Logic Design (DLD)

Introduction to Digital Systems

  1. Analog vs. Digital signals MCQs
  2. Binary numbers and arithmetic MCQs
  3. Logic levels and noise margins MCQs

Boolean Algebra

  1. Basic logic operations (AND, OR, NOT) MCQ
  2. Laws and theorems of Boolean algebra MCQ
  3. De Morgan’s Theorems MCQ
  4. Canonical forms (Sum of Products, Product of Sums) MCQ
  5. Simplification techniques (Karnaugh Maps, Quine-McCluskey method) MCQ

Combinational Logic

Logic Gates

  1. Basic gates (AND, OR, NOT) Gat MCQ
  2. Universal gates (NAND, NOR) Gat MCQs
  3. XOR and XNOR gates MCQ

Combinational Circuits

  1. Design and analysis of combinational circuits MCQ
  2. Multiplexers and Demultiplexers MCQ
  3. Encoders and Decoders MCQ
  4. Binary Adders (Half adder, Full adder) MCQ
  5. Subtractors and Arithmetic Logic Units (ALU) MCQ
  6. Comparators MCQ in DLD

Sequential Logic

Flip-Flops and Latches

  1. SR Latch, D Latch MCQ
  2. Flip-Flops (SR, D, JK, T) MCQ
  3. Characteristic equations and excitation tables MCQ
  4. Edge-triggered vs. level-triggered devices MCQ

Counters and Registers

  1. Synchronous, Asynchronous (ripple), Up/Down counters MCQs
  2. Shift registers (SIPO, PISO, SISO, PIPO) MCQs

State Machines

Finite State Machines (FSMs)

  1. Moore and Mealy machines MCQs

Memory and Programmable Logic MCQs

Memory Devices

  1. Read-Only Memory (ROM)
  2. Random Access Memory (RAM)
  3. Programmable Logic Devices (PLDs) MCQs
  4. Field Programmable Gate Arrays (FPGAs) MCQs

More MCQs of Digital Logic Design (DLD)

Computer Science Repeated MCQs Book Download

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