Flip-Flops (SR, D, JK, T) MCQ

What is the primary function of a flip-flop in digital circuits?

A) To store a single bit of data temporarily
B) To perform arithmetic operations
C) To generate clock signals
D) To convert analog signals to digital
Answer: A
Which of the following is a characteristic feature of a flip-flop?

A) It has one input and one output.
B) It has two inputs and one output.
C) It has one input and two outputs.
D) It has two inputs and two outputs.
Answer: D
What are the two inputs of an SR flip-flop?

A) Data and Clock
B) Set and Reset
C) Clock and Enable
D) Data and Enable
Answer: B
What is the output of an SR flip-flop if both Set (S) and Reset (R) inputs are LOW (0)?

A) Output HIGH (1)
B) Output LOW (0)
C) Output depends on gate configuration
D) Output cannot be determined
Answer: C
What is the output of an SR flip-flop if Set (S) input is HIGH (1) and Reset (R) input is LOW (0)?

A) Output HIGH (1)
B) Output LOW (0)
C) Output depends on gate configuration
D) Output cannot be determined
Answer: A
Which gate configuration is used to implement an SR flip-flop?

A) Two cross-coupled NAND gates
B) Two cross-coupled NOR gates
C) One AND gate and one OR gate
D) One XOR gate and one NOT gate
Answer: B
What is the primary purpose of a D flip-flop in digital circuits?

A) To store a single bit of data temporarily
B) To perform arithmetic operations
C) To generate clock signals
D) To convert analog signals to digital
Answer: A
What are the two inputs of a D flip-flop?

A) Data and Enable
B) Set and Reset
C) Clock and Data
D) Data and Clock
Answer: D
What is the output of a D flip-flop if the Data input is LOW (0) and the Clock input transitions from LOW to HIGH?

A) Output HIGH (1)
B) Output LOW (0)
C) Output depends on gate configuration
D) Output cannot be determined
Answer: B
Which gate configuration is used to implement a D flip-flop?

A) Two cross-coupled NAND gates
B) Two cross-coupled NOR gates
C) One AND gate and one OR gate
D) One XOR gate and one NOT gate
Answer: A
What is the primary purpose of a JK flip-flop in digital circuits?

A) To store a single bit of data temporarily
B) To perform arithmetic operations
C) To generate clock signals
D) To convert analog signals to digital
Answer: A
What are the three inputs of a JK flip-flop?

A) J, K, and Enable
B) Set, Reset, and Clock
C) J, K, and Clock
D) Data, Clock, and Enable
Answer: C
What is the output of a JK flip-flop if both J and K inputs are LOW (0) and the Clock input transitions from LOW to HIGH?

A) Output HIGH (1)
B) Output LOW (0)
C) Output depends on gate configuration
D) Output cannot be determined
Answer: C
Which gate configuration is used to implement a JK flip-flop?

A) Two cross-coupled NAND gates
B) Two cross-coupled NOR gates
C) One AND gate and one OR gate
D) One XOR gate and one NOT gate
Answer: A
What is the primary purpose of a T flip-flop in digital circuits?

A) To store a single bit of data temporarily
B) To perform arithmetic operations
C) To generate clock signals
D) To convert analog signals to digital
Answer: A
What are the two inputs of a T flip-flop?

A) T and Enable
B) Set and Reset
C) Clock and T
D) Data and Clock
Answer: C
What is the output of a T flip-flop if the T input is LOW (0) and the Clock input transitions from LOW to HIGH?

A) Output HIGH (1)
B) Output LOW (0)
C) Output depends on gate configuration
D) Output cannot be determined
Answer: B
Which gate configuration is used to implement a T flip-flop?

A) Two cross-coupled NAND gates
B) Two cross-coupled NOR gates
C) One AND gate and one OR gate
D) One XOR gate and one NOT gate
Answer: A
What is the primary difference between an SR flip-flop and a D flip-flop?

A) Number of inputs
B) Number of outputs
C) Operation during clock transitions
D) Implementation using gates
Answer: C
What is the primary difference between a JK flip-flop and a T flip-flop?

A) Number of inputs
B) Number of outputs
C) Operation during clock transitions
D) Implementation using gates
Answer: A

MCQs of Digital Logic Design (DLD)

Introduction to Digital Systems

1. Analog vs. Digital signals MCQs
2. Binary numbers and arithmetic MCQs
3. Logic levels and noise margins MCQs

Boolean Algebra

1. Basic logic operations (AND, OR, NOT) MCQ
2. Laws and theorems of Boolean algebra MCQ
3. De Morgan’s Theorems MCQ
4. Canonical forms (Sum of Products, Product of Sums) MCQ
5. Simplification techniques (Karnaugh Maps, Quine-McCluskey method) MCQ

Combinational Logic

Logic Gates

1. Basic gates (AND, OR, NOT) Gat MCQ
2. Universal gates (NAND, NOR) Gat MCQs
3. XOR and XNOR gates MCQ

Combinational Circuits

1. Design and analysis of combinational circuits MCQ
2. Multiplexers and Demultiplexers MCQ
3. Encoders and Decoders MCQ
4. Binary Adders (Half adder, Full adder) MCQ
5. Subtractors and Arithmetic Logic Units (ALU) MCQ
6. Comparators MCQ in DLD

Sequential Logic

Flip-Flops and Latches

1. SR Latch, D Latch MCQ
2. Flip-Flops (SR, D, JK, T) MCQ
3. Characteristic equations and excitation tables MCQ
4. Edge-triggered vs. level-triggered devices MCQ

Counters and Registers

1. Synchronous, Asynchronous (ripple), Up/Down counters MCQs
2. Shift registers (SIPO, PISO, SISO, PIPO) MCQs

State Machines

Finite State Machines (FSMs)

1. Moore and Mealy machines MCQs

Memory and Programmable Logic MCQs

Memory Devices

1. Read-Only Memory (ROM)
2. Random Access Memory (RAM)
3. Programmable Logic Devices (PLDs) MCQs
4. Field Programmable Gate Arrays (FPGAs) MCQs

More MCQs of Digital Logic Design (DLD)

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  • SET 3: DLD MCQs (solved mcqs of dld)
  • SET 4: DLD MCQs (dld repeated mcqs)
  • SET 5: DLD MCQs (dld important mcqs)
  • SET 6:DLD MCQs DLD Solved MCQs Answers PDF

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