MCQs Digital Logic Design

1. When we input two values 0 and 1 which of the following gates would output 1?
A. OR gate

C. AND gate
D. both a and c

D

2. one nibble= ________ bits
A. 16
B. 8
C. 4
D. 2
C

3. flip-flops that are unlocked are called

B. register
C. Latches
D. None
C

4. Which is not equal to x?
A. X NAND 1
B. X NOR X
C. X NAND X
D. X NOR 1
D

5.What value Excess-8 code assigns to “-8”?
A. 0000
B. 1100
C. 1110
D. 1000
A

6. How many rows are needed in the primitive flow table for the gated latch?
A. 1 row
B. 3 rows
C. 5 rows
D. 7 rows
A

7. Which gate is added to the inputs to convert OR gate into NAND gate?
A. XOR
B. AND
C. OR
D. NOT
D

8. LUT What is the acronym for LUT?
A. Local User Terminal
B. Least Upper Time Period
C. Look Up Table
D. None of given options
C

9. Final stable state in all cases is ____________.
A. undefined
B. same
C. changed
D. inverted
B

10. Which gate is equal to the EXCLUSIVE NOR gate if we put the inverter on it?
A. NAND
B. AND
C. XOR
D. OR
C

11. The three basic gates are
A. NOT, NOR, XOR
B. OR, AND, NAND
C. AND, NAND, XOR
D. NOT, OR, AND
D

12.In timing problem of _______________ complexity of asynchronous circuit is involved.
A. inputs
B. feedback path
C. clock pulses
D. outputs
B

MCQs of Digital Logic Design (DLD)

Introduction to Digital Systems

Boolean Algebra

1. Basic logic operations (AND, OR, NOT) MCQ
2. Laws and theorems of Boolean algebra MCQ
3. De Morgan’s Theorems MCQ
4. Canonical forms (Sum of Products, Product of Sums) MCQ
5. Simplification techniques (Karnaugh Maps, Quine-McCluskey method) MCQ

Combinational Logic

Logic Gates

Combinational Circuits

Sequential Logic

Flip-Flops and Latches

Counters and Registers

State Machines

Finite State Machines (FSMs)

1. Moore and Mealy machines MCQs

Memory and Programmable Logic MCQs

Memory Devices

More MCQs of Digital Logic Design (DLD)

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