Important MCQs of DLD
1. Why we use demultiplexer?
A. Route the data from single input to one of many outputs
B. Select data from several inputs and route it to a single output
C. Perform serial to parallel conversion
D. Both a and b
2. Which is an example of synchronous inputs?
A. Preset input (PRE)
B. EN input
C. J-K input
D. Clear Input (CLR)
3. Which one is the Second step of making transition table?
A. determining feedback loop
B. designating output of loops
C. deriving functions of Y
4. We can be imagined that an or gate is look like ____________
A. Switches connected in parallel
B. Switches connected in series
C. MOS transistors connected in series
D. None of these
5. The change from a current state to the next state is determined by
A. Previous state and outputs
B. Current state and outputs
C. Current state and the inputs
D. Previous state and inputs
6. Each gate take time for delay ______________
A. 2 to 10 ns
B. 3 to 10 ns
C. 1 to 5 ns
D. 3 to 5 ns
7. In Which combination of gates the arbitrary Boolean function is not possible?
A. OR gates and exclusive OR gate only
B. NAND gates only
C. OR gates and NOT gates only
D. OR gates and AND gates only
8. Which one of the following is used to simplify the circuit that determines the next state?
A. State diagram
B. State assignment
C. State reduction
D. Next state table
9. When both inputs are ____________ then NAND latch works.
D. don’t cares
10.____________adders are needed to construct an m-bit parallel adder.
11. ________________ is converted by a multiplexer with a register circuit.
A. Serial data to serial
B. Serial data to parallel
C. Parallel data to serial
D. Parallel data to parallel
12. changing in input more than one state is called _______________
A. undefined condition
B. ideal condition
C. reset condition
D. race condition