Important MCQs of DLD

By: Prof. Dr. Fazal Rehman | Last updated: June 8, 2024

1. Why we use demultiplexer?

A. Route the data from a single input to one of many outputs
B. Select data from several inputs and route it to a single output
C. Perform serial to parallel conversion
D. Both a and b

2. Which is an example of synchronous inputs?

A. Preset input (PRE)
B. EN input
C. J-K input
D. Clear Input (CLR)

3. Which one is the Second step of making transition table?

A. determining feedback loop
B. designating output of loops
C. deriving functions of Y
D. plotting 

4. We can be imagined that an or gate is look like ____________

A. Switches connected in parallel
B. Switches connected in series
C. MOS transistors connected in series
D. None of these

5. The change from a current state to the next state is determined by

A. Previous state and outputs
B. Current state and outputs
C. Current state and the inputs
D. Previous state and inputs

6. Each gate take time for delay ______________

A. 2 to 10 ns
B. 3 to 10 ns
C. 1 to 5 ns
D. 3 to 5 ns

7. In Which combination of gates the arbitrary Boolean function is not possible?

A. OR gates and exclusive OR gate only
B. NAND gates only
C. OR gates and NOT gates only
D. OR gates and AND gates only

8. Which one of the following is used to simplify the circuit that determines the next state?

A. State diagram
B. State assignment
C. State reduction
D. Next state table

9. When both inputs are ____________ then NAND latch works.

A. inverted
B. 0
C. 1
D. don’t cares

10.____________adders are needed to construct an m-bit parallel adder.

A. m+1
B. m-1
C. m
D. m/2

11. ________________ is converted by a multiplexer with a register circuit.

A. Serial data to serial
B. Serial data to parallel
C. Parallel data to serial
D. Parallel data to parallel

12. changing in input more than one state is called _______________

A. undefined condition
B. ideal condition
C. reset condition
D. race condition

13.

Select the function of a multiplexer
A. to perform serial to parallel conversion
B. to decode information
C. to transit data on N lines
D. Multiplexer is used to select 1 out of N input data sources and to transmit it to a single channel

Answer D. The multiplexer is used to select 1 out of N input data sources and to transmit it to a single channel

14. Select the combinational logic circuit which produces a specific binary word or number is

A. Encoder

B. Multiplexer

C. Decoder

D. Demultiplexer

Answer C. Decoder

15. Select from the following which circuit can be used as parallel to serial converter ?
A. Decoder
B. Demultiplexer
C. Multiplexer
D. Digital counter

Answer C. Multiplexer
16. Select the work of Shift registers from the following?
(A)shifting
(B)rotating
(C)both a and b
(D)adding

Answer: c. both a and b
17. The 7 segment produce output

(A). a to g
(B). a to f
(D). a to b
(D). a to z

Answer: a. a to g

18. Select the BCD to 7 segment
(A). Multiplexer
(B). encoder
(C) decoder
(D). Demultiplexer

Answer: c. decoder

19. Select the universal gate
(A) NAND
(B) AND
(C) OR
(D). NOT

Answer: a. NAND

20. Select the one operation that is not given by magnitude comparator
(A). equal
(B). addition
(C). greater
(D). less

Answer: b. addition
21. Enable input of the shift register is commonly called?
(A). load
(B). strobe
(C). reset
(D). store

Answer: b. strobe

 

MCQs of Digital Logic Design (DLD)

Introduction to Digital Systems

1. Analog vs. Digital signals MCQs
2. Binary numbers and arithmetic MCQs
3. Logic levels and noise margins MCQs

Boolean Algebra

1. Basic logic operations (AND, OR, NOT) MCQ
2. Laws and theorems of Boolean algebra MCQ
3. De Morgan’s Theorems MCQ
4. Canonical forms (Sum of Products, Product of Sums) MCQ
5. Simplification techniques (Karnaugh Maps, Quine-McCluskey method) MCQ

Combinational Logic

Logic Gates

1. Basic gates (AND, OR, NOT) Gat MCQ
2. Universal gates (NAND, NOR) Gat MCQs
3. XOR and XNOR gates MCQ

Combinational Circuits

1. Design and analysis of combinational circuits MCQ
2. Multiplexers and Demultiplexers MCQ
3. Encoders and Decoders MCQ
4. Binary Adders (Half adder, Full adder) MCQ
5. Subtractors and Arithmetic Logic Units (ALU) MCQ
6. Comparators MCQ in DLD

Sequential Logic

Flip-Flops and Latches

1. SR Latch, D Latch MCQ
2. Flip-Flops (SR, D, JK, T) MCQ
3. Characteristic equations and excitation tables MCQ
4. Edge-triggered vs. level-triggered devices MCQ

Counters and Registers

1. Synchronous, Asynchronous (ripple), Up/Down counters MCQs
2. Shift registers (SIPO, PISO, SISO, PIPO) MCQs

State Machines

Finite State Machines (FSMs)

1. Moore and Mealy machines MCQs

Memory and Programmable Logic MCQs

Memory Devices

1. Read-Only Memory (ROM)
2. Random Access Memory (RAM)
3. Programmable Logic Devices (PLDs) MCQs
4. Field Programmable Gate Arrays (FPGAs) MCQs

More MCQs of Digital Logic Design (DLD)

• • SET 1: DLD MCQs with answers (dld mcqs with answers)
  • SET 2: DLD MCQs (dld basic mcqs)
  • SET 3: DLD MCQs (solved mcqs of dld)
  • SET 4: DLD MCQs (dld repeated mcqs)
  • SET 5: DLD MCQs (dld important mcqs)
  • SET 6:DLD MCQs DLD Solved MCQs Answers PDF

MCQs collection of solved and repeated MCQs with answers for the preparation of competitive exams, admission test and job of PPSC, FPSC, UPSC, AP, APPSC, APSC, BPSC, PSC, GOA, GPSC, HPSC, HP, JKPSC, JPSC, KPSC, KERALAPSC, MPPSC, MPSC, MPSCMANIPUR, MPSC, NPSC, OPSC, RPSC, SPSCSKM, TNPSC, TSPSC, TPSC, UPPSC, UKPSC, SPSC, KPPSC, BPSC, AJKPSC ALPSC, NPSC, LPSC, SCPSC, DPSC, DCPSC, PSC, UPSC, WVPSC, PSCW, and WPSC.