Memory Hierarchy MCQs – T4Tutorials.com

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1. : What is the primary purpose of the memory hierarchy in computer systems?
(A) To reduce the cost of memory
(B) To optimize the performance by providing a balance between speed and cost
(C) To increase the number of processors
(D) To enhance the graphic capabilities

2. : Which level of the memory hierarchy is typically the fastest?
(A) Main memory
(B) Cache memory
(C) Disk storage
(D) Registers

3. : What is the main advantage of having multiple levels in the memory hierarchy?
(A) It simplifies the memory management
(B) It reduces the need for data compression
(C) It allows for faster data access by using faster, more expensive memory for frequently accessed data
(D) It increases the physical size of memory

4. : Which of the following is not typically considered part of the memory hierarchy?
(A) L1 Cache
(B) Main memory (RAM)
(C) Disk storage
(D) Network Interface Card (NIC)

5. : What is the primary role of cache memory in the memory hierarchy?
(A) To store large amounts of data permanently
(B) To speed up access to frequently used data by storing it closer to the CPU
(C) To manage network communication
(D) To perform complex calculations

6. : Which memory level is known for having the highest latency?
(A) Cache memory
(B) Main memory
(C) Registers
(D) Disk storage

7. : In the context of memory hierarchy, what is “temporal locality”?
(A) The tendency for data to be reused within a short time period
(B) The tendency for data to be reused across different programs
(C) The likelihood that data will be located close to the CPU
(D) The probability that data will be accessed from disk storage

8. : What is “spatial locality” in memory access patterns?
(A) The tendency for data located close to recently accessed data to be accessed soon
(B) The tendency for data to be accessed in a random manner
(C) The probability that data will be accessed from registers
(D) The tendency for data to be accessed only by one process

9. : Which type of cache is typically the smallest but fastest?
(A) L1 Cache
(B) L2 Cache
(C) L3 Cache
(D) Main memory

10. : What is the primary function of virtual memory in the memory hierarchy?
(A) To increase the physical size of RAM
(B) To provide an abstraction of a large, contiguous memory space using disk storage
(C) To speed up cache memory access
(D) To manage network communications

11. : Which of the following is a common technique used to reduce cache miss rates?
(A) Increasing the cache size
(B) Reducing the number of registers
(C) Increasing the disk storage capacity
(D) Decreasing the memory bandwidth

12. : What is a cache miss?
(A) When data requested is found in the cache
(B) When data requested is not found in the cache and must be fetched from a lower-level memory
(C) When data is successfully written to the cache
(D) When the cache is full

13. : Which type of cache typically has the largest size but the highest latency?
(A) L1 Cache
(B) L2 Cache
(C) L3 Cache
(D) Main memory

14. : What does the term “cache coherence” refer to?
(A) The consistency of data stored in different cache levels
(B) The process of synchronizing cache with disk storage
(C) The ability of the CPU to maintain cache consistency
(D) The consistency of data between different CPUs’ caches in a multiprocessor system

15. : What is the purpose of a page table in virtual memory systems?
(A) To manage the allocation of physical memory
(B) To keep track of the mapping between virtual addresses and physical addresses
(C) To cache frequently used pages
(D) To increase disk storage capacity

16. : What does “paging” refer to in the context of virtual memory?
(A) The process of loading data from disk to RAM
(B) The process of dividing physical memory into fixed-size blocks
(C) The process of dividing virtual memory into fixed-size blocks called pages
(D) The process of increasing the size of cache memory

17. : Which level of the memory hierarchy provides the slowest access times but the largest storage capacity?
(A) Registers
(B) Cache memory
(C) Main memory
(D) Disk storage

18. : What is the purpose of the “write-back” policy in cache memory?
(A) To write data to the cache and update the main memory immediately
(B) To write data to the cache and update the main memory only when the data is evicted from the cache
(C) To read data from the main memory and write it to the cache
(D) To prevent data from being written to the cache

19. : What is the role of a “cache line” or “cache block”?
(A) To hold a single data item in the cache
(B) To hold a fixed-size block of data fetched from main memory
(C) To manage the cache coherence protocol
(D) To store metadata for cache management

20. : Which of the following is NOT a typical cache replacement policy?
(A) Least Recently Used (LRU)
(B) First-In-First-Out (FIFO)
(C) Random Replacement
(D) Most Recently Used (MRU)

21. : What is the primary goal of using a “write-through” cache policy?
(A) To reduce write latency
(B) To ensure that data written to the cache is also written to the main memory immediately
(C) To increase the size of the cache
(D) To improve the read performance

22. : What is “cache associativity”?
(A) The process of associating cache lines with physical memory addresses
(B) The degree to which a cache line can be mapped to different cache locations
(C) The process of associating different cache levels with each other
(D) The number of data items stored in a cache line

23. : What is the benefit of having a “fully associative” cache?
(A) It has the lowest latency among all cache types
(B) It has the highest hit rate because any cache line can store any block of data
(C) It is the simplest to implement
(D) It uses the least amount of power

24. : Which cache policy would likely be used to minimize the impact of frequent data writes?
(A) Write-back
(B) Write-through
(C) No-write allocation
(D) Read-allocate

25. : What is a “cache hit”?
(A) When data requested is found in the cache
(B) When data requested is not found in the cache
(C) When data is written to the cache
(D) When data is evicted from the cache

26. : Which component of a CPU handles the translation of virtual addresses to physical addresses?
(A) Memory Management Unit (MMU)
(B) Cache controller
(C) Register file
(D) Arithmetic Logic Unit (ALU)

27. : What is “cache pollution”?
(A) The process of cache lines being overwritten by less frequently used data
(B) The increase in cache size
(C) The addition of more cache levels
(D) The reduction of cache access time

28. : Which type of memory is typically used to store the operating system’s kernel and device drivers?
(A) Cache memory
(B) Main memory (RAM)
(C) Disk storage
(D) Registers

29. : What does “memory bandwidth” refer to in the context of memory systems?
(A) The amount of memory available
(B) The rate at which data can be read from or written to memory
(C) The speed of the memory clock
(D) The size of the cache memory

30. : Which technique helps reduce the latency of memory access by providing a smaller, faster memory close to the CPU?
(A) Virtual memory
(B) Caching
(C) Paging
(D) Swapping

31. : What is the purpose of the “write-allocate” policy in caching?
(A) To allocate a new cache line for every write operation, and write the data to both the cache and the main memory
(B) To allocate a cache line only for read operations
(C) To update the cache line only if it is not already present
(D) To write data to the main memory only and avoid cache allocation

32. ChatGPT said:
Q#32: In which type of cache mapping are blocks of data mapped to a specific set of cache lines based on their address?
(A) Direct-mapped cache
(B) Fully associative cache
(C) Set-associative cache

33. : Which memory hierarchy component is directly responsible for handling page faults?
(A) Cache controller
(B) Memory Management Unit (MMU)
(C) Arithmetic Logic Unit (ALU)
(D) Disk storage

34. : What is a “page fault”?
(A) An error in the page table
(B) An error caused when a program accesses a page not currently in physical memory
(C) A fault in the cache memory
(D) A discrepancy in the virtual memory allocation

35. : What is the purpose of “cache coherence protocols” in a multiprocessor system?
(A) To ensure that all caches in the system have the same data for a given memory address
(B) To increase the cache size
(C) To reduce the number of processors
(D) To manage virtual memory allocation

36. : Which of the following is a method to improve cache performance?
(A) Increasing the cache miss rate
(B) Reducing cache associativity
(C) Increasing cache line size
(D) Decreasing cache size

37. : What is the typical access time for L1 cache compared to main memory?
(A) L1 cache access time is much slower
(B) L1 cache access time is the same as main memory
(C) L1 cache access time is much faster
(D) L1 cache access time varies significantly depending on the cache size

38. : What does the term “cache coherence” imply in a multi-core system?
(A) The coherence of cache sizes across cores
(B) The consistency of data in caches across different cores
(C) The performance of the cache in each core
(D) The synchronization of cache access between cores

39. : Which memory hierarchy level typically serves as the “last resort” for data storage before accessing the slower disk storage?
(A) Main memory
(B) L2 Cache
(C) L3 Cache
(D) Disk storage

40. : What is the impact of “false sharing” on cache performance in multi-core systems?
(A) It improves cache performance by reducing data conflicts
(B) It has no impact on cache performance
(C) It degrades cache performance due to unnecessary cache line invalidations and updates
(D) It enhances memory bandwidth

41. : What is the typical function of “write-back” cache policy compared to “write-through”?
(A) Write-back updates main memory only when cache lines are replaced, while write-through updates both cache and main memory simultaneously
(B) Write-back policy updates main memory immediately, while write-through waits until the cache line is replaced
(C) Write-back policy increases latency, while write-through reduces it
(D) Write-back policy writes data to disk, while write-through writes to RAM

42. : What does “demand paging” refer to in virtual memory systems?
(A) Preloading all pages into memory
(B) Loading pages into memory only when they are needed
(C) Swapping pages between disk and memory proactively
(D) Allocating memory without paging

43. : Which type of cache mapping technique typically provides the best balance between complexity and performance?
(A) Direct-mapped cache
(B) Fully associative cache
(C) Set-associative cache
(D) Virtual cache

44. : How does the “least recently used” (LRU) cache replacement policy work?
(A) It replaces the cache line that was used the least recently
(B) It replaces the cache line that was used most recently
(C) It replaces the cache line that has been in the cache the longest
(D) It replaces the cache line based on a random selection

45. : What is the effect of increasing the cache size on cache performance?
(A) It decreases the hit rate
(B) It has no impact on cache performance
(C) It generally increases the hit rate and reduces the miss rate
(D) It increases cache latency

46. : What is the purpose of “cache line replacement” policies?
(A) To manage the size of cache memory
(B) To determine which cache lines to remove when new data needs to be loaded
(C) To increase the cache bandwidth
(D) To synchronize cache data between processors

47. : What is the typical consequence of having a small cache line size?
(A) Increased cache miss rate due to more frequent cache line replacements
(B) Increased cache hit rate due to more data being stored
(C) Decreased latency for data access
(D) Improved cache performance due to larger cache size

48. : In a multi-core system, which of the following techniques is used to maintain cache coherence?
(A) Cache partitioning
(B) Cache flushing
(C) Cache coherence protocols
(D) Cache swapping

49. : What is the primary goal of “prefetching” in memory systems?
(A) To load data into the cache before it is actually needed to reduce latency
(B) To increase the physical memory size
(C) To manage cache coherence
(D) To reduce memory bandwidth usage

50. : What does the term “cache burst” refer to?
(A) A sudden increase in cache access requests
(B) A period where cache usage is significantly reduced
(C) A technique to increase cache size
(D) An error in cache management

51. : What is the primary function of a “write-around” cache policy?
(A) To bypass the cache for write operations and write data directly to the main memory
(B) To update both the cache and main memory simultaneously
(C) To write data to the cache and later update the main memory
(D) To allocate a new cache line for every write operation

52. : What does “thrashing” refer to in the context of virtual memory?
(A) Excessive swapping of pages between disk and memory due to insufficient memory
(B) The process of loading all pages into memory
(C) The process of prefetching pages into cache
(D) The efficient use of cache memory

53. : Which memory hierarchy component typically has the lowest cost per bit?
(A) Registers
(B) Cache memory
(C) Main memory
(D) Disk storage

54. : What is the purpose of “address translation” in virtual memory systems?
(A) To map virtual addresses to physical addresses
(B) To increase the size of the virtual memory space
(C) To synchronize cache data
(D) To manage disk storage

Memory Hierarchy MCQs
By: Prof. Dr. Fazal Rehman | Last updated: June 23, 2025

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