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Instruction Cycle and Control Flow MCQs

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1. What is the primary purpose of the instruction cycle?
(A) To execute a single instruction
(B) To fetch, decode, and execute instructions
(C) To manage memory allocation
(D) To handle I/O operations

2. Which of the following stages comes first in the instruction cycle?
(A) Execute
(B) Decode
(C) Fetch
(D) Store

3. What does the decode stage of the instruction cycle do?
(A) Retrieves the instruction from memory
(B) Decodes the instruction into executable commands
(C) Executes the decoded command
(D) Stores the result of the execution

4. In which stage of the instruction cycle is the Program Counter (PC) updated?
(A) Fetch
(B) Decode
(C) Execute
(D) Store

5. Which register typically holds the address of the next instruction to be executed?
(A) Accumulator
(B) Instruction Register
(C) Program Counter
(D) Stack Pointer

6. What does the execute stage of the instruction cycle involve?
(A) Fetching the instruction
(B) Decoding the instruction
(C) Performing the operation specified by the instruction
(D) Updating the Program Counter

7. Which of the following is not a part of the instruction cycle?
(A) Fetch
(B) Decode
(C) Store
(D) Interrupt

8. What happens during the ‘store’ phase of the instruction cycle?
(A) The instruction is retrieved from memory
(B) The result of the execution is saved to memory
(C) The instruction is decoded into commands
(D) The Program Counter is incremented

9. What is the primary function of the control unit in a CPU?
(A) Perform arithmetic operations
(B) Manage data storage
(C) Direct the operation of the processor
(D) Handle I/O operations

10. Loops & Control Flow

11. Which control flow statement is used to execute a block of code repeatedly based on a condition?
(A) if-else
(B) switch
(C) for loop
(D) goto

12. In a switch statement, what determines which case block will be executed?
(A) The value of the switch expression
(B) The order of the case blocks
(C) The default case
(D) The number of case blocks

13. What is the purpose of the ‘break’ statement in a switch-case construct?
(A) To exit the switch block and continue with the next statement
(B) To repeat the current case block
(C) To skip the rest of the current case block
(D) To exit the entire program

14. Which statement is used to terminate the execution of a loop prematurely?
(A) continue
(B) exit
(C) break
(D) return

15. What is the primary function of a ‘goto’ statement?
(A) To repeat a block of code
(B) To jump to a specific part of the code
(C) To conditionally execute code
(D) To handle exceptions

16. Which control flow statement executes one block if a condition is true and another if it is false?
(A) for
(B) while
(C) if-else
(D) switch

17. What happens if a ‘continue’ statement is encountered in a loop?
(A) The loop terminates immediately
(B) The current iteration is skipped and the next iteration begins
(C) The entire program terminates
(D) The loop condition is re-evaluated

18. What does a ‘return’ statement do in a function?
(A) Exits the function and optionally returns a value
(B) Continues execution of the function
(C) Terminates the entire program
(D) Jumps to a specific line of code

19. Which statement is used to handle multiple conditions in a branching statement?
(A) if-else
(B) for
(C) while
(D) switch

20. What is the purpose of the ‘default’ case in a switch statement?
(A) To handle unexpected values
(B) To repeat the current case
(C) To exit the switch block
(D) To skip the rest of the switch statement

21. What is the function of a loop’s condition?
(A) To determine the number of iterations
(B) To execute a block of code repeatedly
(C) To terminate the loop when false
(D) To initialize the loop variable

Read More Computer Architecture MCQs

SET 1: Computer Architecture MCQs
SET 2: Computer Architecture MCQs
SET 3: Computer Architecture MCQs
SET 4: Computer Architecture MCQs
SET 5: Computer Architecture MCQs
SET 6: Computer Architecture MCQs
SET 7: Computer Architecture MCQs
SET 8: Computer Architecture MCQs
SET 9: Computer Architecture MCQs

Introduction to Computer Architecture MCQs
- Evolution of Computer Architecture MCQs
- von Neumann vs Harvard Architecture MCQs
Basic Components of a Computer System MCQs
- Central Processing Unit (CPU) MCQs
- Memory (RAM, ROM, Cache) MCQs
- Input/Output (I/O) Devices MCQs
- Buses (Data, Address, Control) MCQs
CPU Organization MCQs
- ALU (Arithmetic Logic Unit) MCQs
- Control Unit MCQs
- Registers (General Purpose, Special Purpose) MCQs
- Flags and Status Registers MCQs
Instruction Set Architecture (ISA) MCQs
- Types of Instructions (Data Movement, Arithmetic, Control) MCQs
- Addressing Modes (Immediate, Direct, Indirect, Indexed) MCQs
- Instruction Formats MCQs
- RISC (Reduced Instruction Set Computer) vs CISC (Complex Instruction Set Computer) MCQs
Microarchitecture MCQs
- Pipelining (Stages and Hazards) MCQs
- Superscalar Architecture MCQs
- Multithreading MCQs
- Out-of-Order Execution MCQs
Memory Hierarchy MCQs
- Cache Memory (L1, L2, L3) MCQs
- Virtual Memory MCQs
- Paging and Segmentation MCQs
- TLB (Translation Lookaside Buffer) MCQs
Cache Memory MCQs
- Cache Mapping Techniques (Direct, Associative, Set-Associative) MCQs
- Cache Coherency MCQs
- Write Policies (Write-Through, Write-Back) MCQs
- Cache Miss and Hit MCQs
Input/Output Organization MCQs
- I/O Techniques (Polling, Interrupts, DMA) MCQs
- I/O Mapping (Memory-Mapped I/O, Isolated I/O) MCQs
- Interrupt Handling MCQs
Bus Architecture MCQs
- System Bus (Data, Address, Control) MCQs
- Bus Arbitration MCQs
- Synchronous vs Asynchronous Buses MCQs
Performance Metrics MCQs
- Clock Speed and Cycles per Instruction (CPI) MCQs
- MIPS (Million Instructions per Second) MCQs
- FLOPS (Floating-Point Operations per Second) MCQs
- Amdahl’s Law MCQs
Parallelism in Computer Architecture MCQs
- Instruction-Level Parallelism (ILP) MCQs
- Data-Level Parallelism (DLP) MCQs
- Thread-Level Parallelism (TLP) MCQs
- Symmetric Multiprocessing (SMP) vs Asymmetric Multiprocessing (AMP) MCQs
Multicore and Multiprocessor Systems MCQs
- Multicore Architectures MCQs
- Shared Memory vs Distributed Memory MCQs
- Interconnection Networks MCQs
Control Unit Design MCQs
- Hardwired Control vs Microprogrammed Control MCQs
- Control Signals and Timing MCQs
- Instruction Cycle and Control Flow MCQs
Pipeline Hazards MCQs
- Structural, Data, and Control Hazards MCQs
- Techniques to Overcome Hazards (Stalling, Forwarding, Branch Prediction) MCQs
Branch Prediction and Speculation MCQs
- Static and Dynamic Branch Prediction MCQs
- Speculative Execution MCQs
- Branch Target Buffers MCQs
Arithmetic and Logic Operations MCQs
- Integer and Floating-Point Arithmetic MCQs
- ALU Design MCQs
- Fixed-Point vs Floating-Point Representation MCQs
Memory Management MCQs
- Paging, Segmentation, and Virtual Memory MCQs
- Memory Protection and Privilege Levels MCQs
- Memory Allocation and Deallocation MCQs
Power and Energy Efficiency MCQs
- Power Dissipation in CPUs MCQs
- Low-Power Design Techniques MCQs
- Energy-Aware Computing MCQs
Advanced Topics MCQs
- GPU Architecture and Usage MCQs
- Quantum Computing Basics MCQs
- Neuromorphic Computing MCQs
Emerging Trends
- Cloud Computing Architectures MCQs
- Edge Computing MCQs
- AI Accelerators MCQs

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