The Branch Target Buffer (BTB) is used to:
A) Store predicted branch outcomes
B) Store target addresses of taken branches
C) Store the branch instruction itself
D) Store the pipeline status during a branch
Answer: B
BTB is typically implemented in:
A) Data cache
B) Instruction cache
C) CPU registers
D) Separate hardware unit
Answer: D
The purpose of a Branch Target Buffer is to:
A) Predict branch direction
B) Store past instruction results
C) Cache memory addresses
D) Store target addresses for predicted taken branches
Answer: D
A BTB miss occurs when:
A) The predicted branch is not taken
B) The predicted branch outcome is wrong
C) The branch target is not found in the BTB
D) The pipeline is stalled
Answer: C
BTB stores information about:
A) The next instruction to be executed
B) The target address of taken branches
C) The register file state
D) Cache misses and hits
Answer: B
The BTB is most closely associated with which component of the CPU?
A) Arithmetic Logic Unit (ALU)
B) Control Unit
C) Instruction Fetch Unit
D) Floating Point Unit
Answer: C
A BTB hit means that:
A) The branch target address is available
B) The pipeline must be stalled
C) The branch outcome was correctly predicted
D) The CPU needs to re-fetch the instruction
Answer: A
BTB helps improve CPU performance by:
A) Reducing memory access time
B) Storing data used frequently
C) Eliminating pipeline stalls on branches
D) Pre-fetching the next instruction
Answer: C
In a BTB, the target address is stored along with:
A) The memory address of the instruction
B) The predicted branch outcome
C) The opcode of the branch instruction
D) The source and destination registers
Answer: A
A large BTB size typically results in:
A) More frequent cache misses
B) Higher accuracy in branch target prediction
C) Decreased pipeline efficiency
D) More instruction stalls
Answer: B
The accuracy of BTB predictions depends on:
A) Cache size
B) Clock speed
C) Branch instruction frequency
D) History of branch outcomes
Answer: D
In the event of a BTB miss, the CPU typically:
A) Executes the branch speculatively
B) Flushes the pipeline
C) Fetches the branch target address from memory
D) Reverts to static branch prediction
Answer: C
The BTB is updated when:
A) The pipeline is flushed
B) A branch is predicted incorrectly
C) The correct target address of a branch is known
D) A cache miss occurs
Answer: C
Which of the following information is typically not stored in a BTB entry?
A) Target address of the branch
B) Branch prediction history
C) Instruction opcode
D) Program counter of the branch instruction
Answer: C
One benefit of a BTB is:
A) Reducing memory access time
B) Improved data locality
C) Faster instruction fetch for predicted branches
D) Simplified control logic
Answer: C
If a branch is not found in the BTB, the CPU typically:
A) Predicts it as not taken
B) Stalls until the branch is resolved
C) Issues a memory read for the branch target
D) Switches to a different thread
Answer: A
The BTB is usually accessed during:
A) Instruction fetch
B) Instruction decode
C) Execution stage
D) Memory access stage
Answer: A
One disadvantage of a larger BTB is:
A) Increased power consumption
B) Lower branch prediction accuracy
C) More frequent instruction stalls
D) Slower branch resolution
Answer: A
BTB misses can cause:
A) Correct speculative execution
B) Pipeline stalls and delays
C) Reduced cache miss rates
D) Increased clock speeds
Answer: B
BTBs improve performance by:
A) Caching branch outcomes
B) Storing instruction addresses
C) Reducing pipeline flushes on branch instructions
D) Increasing clock frequency
Answer: C
A two-level BTB structure typically:
A) Predicts both branch outcome and target address
B) Improves cache hit rates
C) Caches data for memory operations
D) Reduces branch misprediction penalties
Answer: A
The BTB is most effective when:
A) There are no branches in the instruction stream
B) Branches are frequent and predictable
C) Instructions are executed in-order
D) The cache is large and fast
Answer: B
If the BTB mispredicts a branch target, the CPU must:
A) Execute instructions from both possible paths
B) Flush the pipeline and fetch the correct target
C) Wait for the next clock cycle
D) Update the instruction cache
Answer: B
The effectiveness of a BTB depends on:
A) The speed of memory access
B) The number of floating-point operations
C) The predictability of branches
D) The instruction fetch rate
Answer: C
BTBs are commonly used in:
A) Vector processors
B) Scalar processors
C) Superscalar processors
D) Pipelined processors
Answer: D
In a processor with a BTB, the target of a branch is determined during:
A) Decode stage
B) Fetch stage
C) Execution stage
D) Write-back stage
Answer: B
BTB updates typically occur when:
A) A branch is predicted correctly
B) A branch misprediction is detected
C) The pipeline encounters a hazard
D) The branch instruction is fetched
Answer: B
One trade-off in BTB design is between:
A) Size and power consumption
B) Branch prediction accuracy and memory latency
C) Clock speed and cache size
D) Instruction fetch rate and cache hit rate
Answer: A
In dynamic branch prediction, the BTB is often combined with:
A) Data prefetching
B) Register renaming
C) Branch history table
D) Instruction reordering
Answer: C
BTB performance is degraded when:
A) Cache misses are frequent
B) Branches are highly unpredictable
C) The pipeline is shallow
D) Instruction-level parallelism is low
Answer: B
When the BTB is empty, the processor:
A) Predicts all branches as not taken
B) Fetches branch target addresses from memory
C) Switches to speculative execution
D) Predicts all branches as taken
Answer: A
Branch target buffers improve the performance of:
A) Arithmetic-intensive programs
B) Control-flow-intensive programs
C) Memory-bound programs
D) I/O-bound programs
Answer: B
The information stored in a BTB is primarily used during:
A) The execution stage
B) The write-back stage
C) The fetch stage
D) The memory stage
Answer: C
A BTB typically stores the program counter (PC) value of:
A) Memory load instructions
B) Arithmetic instructions
C) Branch instructions
D) Floating-point instructions
Answer: C
A BTB entry is removed when:
A) A branch is mispredicted
B) The branch is no longer needed
C) The pipeline is stalled
D) Memory access is completed
Answer: B
One of the key roles of the BTB is to:
A) Store data for memory operations
B) Predict the direction of branch instructions
C) Cache frequently used instructions
D) Resolve data hazards
Answer: B
A high BTB hit rate results in:
A) Fewer cache misses
B) Fewer pipeline flushes
C) Higher instruction fetch latency
D) Increased memory access time
Answer: B
BTBs are crucial in modern processors for:
A) Reducing data dependencies
B) Improving branch prediction accuracy
C) Reducing memory access times
D) Increasing cache miss rates
Answer: B
A BTB miss penalty can be reduced by:
A) Increasing clock frequency
B) Enlarging the BTB size
C) Increasing cache size
D) Using speculative execution
Answer: D
The BTB is consulted when:
A) The CPU encounters a memory access
B) The CPU fetches a branch instruction
C) The branch instruction is decoded
D) The pipeline stalls
Answer: B
The BTB is updated with the correct target address:
A) When the branch is taken
B) After the branch instruction is executed
C) At the decode stage
D) When the pipeline is flushed
Answer: B
If the BTB predicts the wrong target, the result is:
A) Correct speculative execution
B) Instruction prefetching
C) A pipeline flush
D) Increased memory access time
Answer: C
A BTB is also sometimes referred to as a:
A) Branch predictor
B) Target address cache
C) Prefetch buffer
D) Branch history table
Answer: B
The size of the BTB affects:
A) The length of the pipeline
B) Branch prediction accuracy
C) Memory access times
D) The clock frequency
Answer: B