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Computer Architecture MCQs from Latest Books Edition

Computer Architecture MCQs from Latest Books Edition

1. Which register connected to the processor bus is a single-way transfer capable?
A. Temp
B. Z
C. PC
D. IR

Answer - Click Here:
B

2. Which of the following is the first operating system used in microprocessor?
A. CPIM
B. Multics
C. Zenix
D. DOS

Answer - Click Here:
A

3. The registers are collectively placed and referred to as ________ in multiple bus organization:
A. Register Block
B. Map registers
C. Set registers
D. Register file

Answer - Click Here:
D

4. What is a multiplexer with a 4-bit data select input?
A. 2: 1 multiplexer
B. 8: 1 multiplexer
C. 4: 1 multiplexer
D. 16: 1 multiplexer

Answer - Click Here:
B

5. What is the main advantage of multiple bus organization over the single bus?
A. Increase in size of the registers
B. Better Connectivity
C. Reduction in the number of cycles for execution
D. None of the these

Answer - Click Here:
C

6. Half adder is an example of __________:
A. Combinational Circuits
B. Asynchronous Circuits
C. Sequential Circuits
D. None of these

Answer - Click Here:
A

7. The ISA standard Buses are used for the connection of:
A. CD/DVD drives and Processor
B. RAM and processor
C. Harddisk and Processor
D. GPU and processor

Answer - Click Here:
C

8. If j=k, the resulting flip-flop is ________ in a JK flip-flop:
A. S-R flip-flop
B. D flip-flop
C. T flip-flop
D. None of these

Answer - Click Here:
A

9. Through which of the following the clock rate of the processor can be improved:
A. By using the overclocking method
B. Reducing the amount of processing done in one step
C. Improving the IC technology of the logic circuits
D. All of the these

Answer - Click Here:
D

10. Master-slave flip-flop is also called _________:
A. Edge triggered flip-flop
B. Pulse triggered flip-flop
C. Level triggered flip-flop
D. None of these

Answer - Click Here:
B

11. What does an optimizing compiler do?
A. Does better memory management
B. Better compilation of the given piece of code
C. Takes advantage of the type of processor and reduces its process time
D. None of these

Answer - Click Here:
C

12. Where does the Fetch and decode cycle is required?
A. Immediate addressing
B. Indirect addressing
C. Direct addressing
D. None of these

Answer - Click Here:
A