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Shift registers (SIPO, PISO, SISO, PIPO) MCQs

1. Which type of shift register takes serial data input and provides parallel data output?

(A) SIPO


(B) PISO


(C) SISO


(D) PIPO



2. In which type of shift register is the data loaded in parallel and shifted out serially?

(A) SIPO


(B) PISO


(C) SISO


(D) PIPO



3. What does SISO stand for in the context of shift registers?

(A) Serial-In Serial-Out


(B) Serial-In Parallel-Out


(C) Parallel-In Serial-Out


(D) Parallel-In Parallel-Out



4. Which shift register type allows parallel loading and parallel output of data?

(A) SIPO


(B) PISO


(C) SISO


(D) PIPO



5. In a SIPO shift register, data is loaded:

(A) All at once


(B) One bit at a time


(C) Two bits at a time


(D) In reverse order



6. Which register type is commonly used to convert serial data to parallel form?

(A) PIPO


(B) PISO


(C) SISO


(D) SIPO



7. In a PISO shift register, the data is inputted:

(A) Serially


(B) In parallel


(C) Randomly


(D) Alternately



8. A shift register that shifts data bits to the right is known as:

(A) Left shift register


(B) Right shift register


(C) Circular shift register


(D) Bi-directional shift register



9. Which shift register type is primarily used for temporary data storage?

(A) SIPO


(B) PISO


(C) SISO


(D) PIPO



10. What is the main application of a PISO shift register?

(A) Serial data transmission


(B) Data storage


(C) Data reception


(D) Data conversion



11. In a SISO shift register, how is data moved through the register?

(A) Parallel transfer


(B) Serial transfer


(C) Both parallel and serial transfer


(D) Random transfer



12. Which component is essential for controlling the data flow in a shift register?

(A) Capacitor


(B) Resistor


(C) Clock pulse


(D) Inductor



13. Which shift register can be used to convert parallel data to serial form?

(A) SIPO


(B) PISO


(C) SISO


(D) PIPO



14. The number of stages in a shift register determines:

(A) The speed of operation


(B) The number of bits it can store


(C) The voltage level


(D) The current capacity



15. Which type of shift register is typically used in digital communication systems?

(A) SIPO


(B) PISO


(C) SISO


(D) PIPO



16. What does the “P” in PISO stand for?

(A) Parallel


(B) Peripheral


(C) Programmable


(D) Pulse



17. In a shift register, shifting occurs on the:

(A) Rising edge of the clock pulse


(B) Falling edge of the clock pulse


(C) Both rising and falling edges


(D) Neither edge



18. Which shift register type is most suitable for serial-to-parallel data conversion?

(A) SISO


(B) SIPO


(C) PISO


(D) PIPO



19. Which device often includes a shift register as part of its design?

(A) ADC (Analog-to-Digital Converter)


(B) DAC (Digital-to-Analog Converter)


(C) Microcontroller


(D) Oscillator



20. In a PIPO shift register, data is:

(A) Loaded serially and retrieved serially


(B) Loaded in parallel and retrieved in parallel


(C) Loaded serially and retrieved in parallel


(D) Loaded in parallel and retrieved serially



 

MCQs of Digital Logic Design (DLD)

Introduction to Digital Systems

  1. Analog vs. Digital signals MCQs
  2. Binary numbers and arithmetic MCQs
  3. Logic levels and noise margins MCQs

Boolean Algebra

  1. Basic logic operations (AND, OR, NOT) MCQ
  2. Laws and theorems of Boolean algebra MCQ
  3. De Morgan’s Theorems MCQ
  4. Canonical forms (Sum of Products, Product of Sums) MCQ
  5. Simplification techniques (Karnaugh Maps, Quine-McCluskey method) MCQ

Combinational Logic

Logic Gates

  1. Basic gates (AND, OR, NOT) Gat MCQ
  2. Universal gates (NAND, NOR) Gat MCQs
  3. XOR and XNOR gates MCQ

Combinational Circuits

  1. Design and analysis of combinational circuits MCQ
  2. Multiplexers and Demultiplexers MCQ
  3. Encoders and Decoders MCQ
  4. Binary Adders (Half adder, Full adder) MCQ
  5. Subtractors and Arithmetic Logic Units (ALU) MCQ
  6. Comparators MCQ in DLD

Sequential Logic

Flip-Flops and Latches

  1. SR Latch, D Latch MCQ
  2. Flip-Flops (SR, D, JK, T) MCQ
  3. Characteristic equations and excitation tables MCQ
  4. Edge-triggered vs. level-triggered devices MCQ

Counters and Registers

  1. Synchronous, Asynchronous (ripple), Up/Down counters MCQs
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State Machines

Finite State Machines (FSMs)

  1. Moore and Mealy machines MCQs

Memory and Programmable Logic MCQs

Memory Devices

  1. Read-Only Memory (ROM)
  2. Random Access Memory (RAM)
  3. Programmable Logic Devices (PLDs) MCQs
  4. Field Programmable Gate Arrays (FPGAs) MCQs

More MCQs of Digital Logic Design (DLD)

Computer Science Repeated MCQs Book Download

MCQs collection of solved and repeated MCQs with answers for the preparation of competitive exams, admission test and job of PPSC, FPSC, UPSC, AP, APPSC, APSC, BPSC, PSC, GOA, GPSC, HPSC, HP, JKPSC, JPSC, KPSC, KERALAPSC, MPPSC, MPSC, MPSCMANIPUR, MPSC, NPSC, OPSC, RPSC, SPSCSKM, TNPSC, TSPSC, TPSC, UPPSC, UKPSC, SPSC, KPPSC, BPSC, AJKPSC ALPSC, NPSC, LPSC, SCPSC, DPSC, DCPSC, PSC, UPSC, WVPSC, PSCW, and WPSC.

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