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DLD Solved MCQs Answers PDF

1. : Select the number that a shift register has in the Integrated Circuit.

(A) 74124


(B) 74123


(C) 74195


(D) 74154



2. : The 16×4 RAM shows that each memory location is of

(A) 2 bits


(B) 8 bits


(C) 4 bits


(D) 16 bits



3. : A 3×8 decoder will have

(A) 4 inputs


(B) 3 inputs


(C) 5 inputs


(D) 6 inputs



4. : Adding 1001 and 0010 produces the output

(A) 0


(B) 1111


(C) 1011


(D) 1010



5. : To shift the data from the right side in the shift register, SH/LD pin must be equal to

(A) 0


(B) 2


(C) 1


(D) None



6. : The IC type 7483 has

(A) 1-bit IC


(B) 4-bit IC


(C) 3-bit IC


(D) 2-bit IC



7. : ‘1’ in most of the logic gates means

(A) 0V


(B) 5V


(C) 1V


(D) 10V



8. : In a 14-pin gate, pin number 14 is marked as

(A) Ground


(B) Vdd


(C) Vcc


(D) AC



9. : When J = 1 and K’ = 1, the flip-flop QA after the shift is equal to

(A) Reset


(B) 0


(C) 1


(D) Defined



10. : What is used to clear the flip-flops?

(A) Multiplexer


(B) Push button


(C) Toggle switch


(D) Demultiplexer



11. : Select the number of ripple counter in IC

(A) 7492


(B) 7865


(C) 7493


(D) 7654



12. : What is it called when the output is equal to zero?

(A) A = B


B” onclick=”checkAnswer(‘q12’, ‘A = B’)”> (B) A > B


(C) A < B


(D) None



13. : Two cross-coupled NAND gates produce

(A) RS Flip-Flop


(B) SR Latch


(C) D Flip-Flop


(D) Master-Slave Flip-Flop



14. : Toggle switches have values of

(A) 1


(B) 0


(C) Both A and B


(D) 2



15. : Logic gates typically operate on

(A) 3V


(B) 4V


(C) 5V


(D) 2V



16. : The clock output and master-slave output produce a

(A) Chart


(B) Map


(C) Timing Diagram


(D) Table



17. : In the full adder circuit using two integrated circuits, one is 7486. Select the other.

(A) 7483


(B) 7400


(C) 74151


(D) 7500



18. : Select the state of WE for write operation in memory

(A) 1


(B) Reset


(C) 0


(D) Cleared



19. : The ME input in RAM stands for

(A) Memory Enabled


(B) Memory Erase


(C) Mechanical Engineer


(D) Mode Erase



20. : Select the combined number for function simplification

(A) 1


(B) 0


(C) 2


(D) 3



21. : The Strobe S in a multiplexer is used as

(A) Reset


(B) Enable


(C) Clear


(D) Stop



22. : The Integrated Circuit number 74151 consists of

(A) 2×1 Mux


(B) 3×8 Decoder


(C) 8×1 Multiplexers


(D) 4-bit Counter



23. : When WE = x, the selected operation is

(A) Running


(B) Storing


(C) Writing


(D) Disabled



24. : The ripple counter IC has ____________ pins

(A) 10 pins


(B) 14 pins


(C) 12 pins


(D) 11 pins



25. : The ratio of two numbers in an operation that determines whether a number is greater, equal, or less than the other is known as

(A) Magnitude Comparator


(B) Logical Circuit


(C) Logic Operator


(D) None of the above



26. : ROM simulator changes binary codes into

(A) Gray Code


(B) Octal


(C) Hex


(D) BCD Code



27. : The ROM simulator adds two 3-bit and 2-bit numbers to give an output of

(A) 2 bits


(B) 4 bits


(C) 3 bits


(D) 5 bits



28. : The four gates in a package are known as

(A) Quadruple


(B) Octruple


(C) Dualruple


(D) Biruple



29. : If E = 0 in an up-down counter with Enable mode, then the counter is

(A) Disable


(B) Enable


(C) Running


(D) None



30. : The 7404 is a

(A) Single Inverter


(B) Decimal Inverter


(C) Binary Inverter


(D) Hex Inverter



31. : The decimal digit in BCD can be expressed through

(A) 1 input line


(B) 4 input lines


(C) 3 input lines


(D) 2 input lines



32. : To start the game in lamp handball, the start switch is located at

(A) Extreme Right Side


(B) Extreme Left Side


(C) Extreme Backside


(D) Both A and B



 

MCQs of Digital Logic Design (DLD)

Introduction to Digital Systems

  1. Analog vs. Digital signals MCQs
  2. Binary numbers and arithmetic MCQs
  3. Logic levels and noise margins MCQs

Boolean Algebra

  1. Basic logic operations (AND, OR, NOT) MCQ
  2. Laws and theorems of Boolean algebra MCQ
  3. De Morgan’s Theorems MCQ
  4. Canonical forms (Sum of Products, Product of Sums) MCQ
  5. Simplification techniques (Karnaugh Maps, Quine-McCluskey method) MCQ

Combinational Logic

Logic Gates

  1. Basic gates (AND, OR, NOT) Gat MCQ
  2. Universal gates (NAND, NOR) Gat MCQs
  3. XOR and XNOR gates MCQ

Combinational Circuits

  1. Design and analysis of combinational circuits MCQ
  2. Multiplexers and Demultiplexers MCQ
  3. Encoders and Decoders MCQ
  4. Binary Adders (Half adder, Full adder) MCQ
  5. Subtractors and Arithmetic Logic Units (ALU) MCQ
  6. Comparators MCQ in DLD

Sequential Logic

Flip-Flops and Latches

  1. SR Latch, D Latch MCQ
  2. Flip-Flops (SR, D, JK, T) MCQ
  3. Characteristic equations and excitation tables MCQ
  4. Edge-triggered vs. level-triggered devices MCQ

Counters and Registers

  1. Synchronous, Asynchronous (ripple), Up/Down counters MCQs
  2. Shift registers (SIPO, PISO, SISO, PIPO) MCQs

State Machines

Finite State Machines (FSMs)

  1. Moore and Mealy machines MCQs

Memory and Programmable Logic MCQs

Memory Devices

  1. Read-Only Memory (ROM)
  2. Random Access Memory (RAM)
  3. Programmable Logic Devices (PLDs) MCQs
  4. Field Programmable Gate Arrays (FPGAs) MCQs

More MCQs of Digital Logic Design (DLD)

Computer Science Repeated MCQs Book Download

MCQs collection of solved and repeated MCQs with answers for the preparation of competitive exams, admission test and job of PPSC, FPSC, UPSC, AP, APPSC, APSC, BPSC, PSC, GOA, GPSC, HPSC, HP, JKPSC, JPSC, KPSC, KERALAPSC, MPPSC, MPSC, MPSCMANIPUR, MPSC, NPSC, OPSC, RPSC, SPSCSKM, TNPSC, TSPSC, TPSC, UPPSC, UKPSC, SPSC, KPPSC, BPSC, AJKPSC ALPSC, NPSC, LPSC, SCPSC, DPSC, DCPSC, PSC, UPSC, WVPSC, PSCW, and WPSC.

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