1. : Which of the following gates gives output 1 if and only if at least one input is 1?
(A) OR
(B) AND
(C) NOR
(D) NAND
2. : For performing the function of a two-input OR gate, what is the minimum number of two-input NAND gates used?
(A) 2
(B) 3
(C) 4
(D) 5
3. : In an application where input signals may ________________, asynchronous circuits are useful.
(A) Never change
(B) Change at any time
(C) Both A and B
(D) None
4. : The time required by a gate or inverter to change its state is called _______________.
(A) Rise time
(B) Decay time
(C) Charging time
(D) Propagation time
5. : The next state in a sequential circuit is determined by ________ and _______.
(A) Current state and external input
(B) Current state, flip-flop output
(C) State variable, current state
(D) Input and clock signal applied
6. : An SR latch contains ______________.
(A) 4 inputs
(B) 3 inputs
(C) 2 inputs
(D) 1 input
7. : If a pulse changes from 10% to 90% of its maximum value, the time required is known as _____________.
(A) Rise time
(B) Operating speed
(C) Propagation time
(D) Decay time
8. : By using two cascading counters _____________ and ____________, the divide-by-60 counter in a digital clock is implemented.
(A) Mod-10, Mod-50
(B) Mod-50, Mod-10
(C) Mod-6, Mod-10
(D) Mod-50, Mod-6
9. : Which table is not part of the asynchronous analysis procedure?
(A) Transition table
(B) Excitation table
(C) Flow table
(D) State table
10. : Digital data can be applied to a gate by a maximum frequency which is called ________________.
(A) Charging time
(B) Propagation speed
(C) Binary level transition period
(D) Operating speed
11. : The minimum time for which an input signal must be maintained at the input of a flip-flop is called the _____________ of the flip-flop.
(A) Set-up time
(B) Hold time
(C) Pulse Stability Time (PST)
(D) Pulse Interval Time
12. : For making a transition table, we use _____________.
(A) 3 steps
(B) 5 steps
(C) 6 steps
(D) 8 steps
