Combinational and Sequential Circuit Design — MCQs – EE 30 Score: 0 Attempted: 0/30 1. A combinational circuit is one whose output depends on: (A) Present input only (B) Past input only (C) Clock signal (D) Feedback 2. A sequential circuit is one whose output depends on: (A) Present and past inputs (B) Present input only (C) Power supply voltage (D) Frequency response 3. Which of the following is a combinational circuit? (A) Encoder (B) Flip-flop (C) Counter (D) Register 4. Which of the following is a sequential circuit? (A) Flip-flop (B) Multiplexer (C) Decoder (D) Adder 5. The main difference between combinational and sequential circuits is the presence of: (A) Memory elements (B) Logic gates (C) Power supply (D) Inputs and outputs 6. A multiplexer performs the function of: (A) Data selection (B) Data storage (C) Data generation (D) Data comparison 7. A demultiplexer performs the function of: (A) Data distribution (B) Data addition (C) Data storage (D) Data encoding 8. A half adder adds: (A) Two binary bits (B) Three binary bits (C) Four binary bits (D) Decimal numbers 9. A full adder adds: (A) Three binary bits (including carry) (B) Two binary bits (C) One binary bit only (D) Four binary bits 10. A decoder converts: (A) Binary information into a single active output line (B) Single line input into binary code (C) Analog signals into digital form (D) Digital signals into analog form 11. An encoder converts: (A) Information from multiple input lines to binary code output (B) Binary input to one active output (C) Serial data to parallel data (D) Analog to digital 12. The basic building block of a sequential circuit is: (A) Flip-flop (B) Multiplexer (C) Decoder (D) Adder 13. Flip-flops are used for: (A) Storing binary information (B) Performing arithmetic operations (C) Encoding data (D) Multiplexing signals 14. A D flip-flop transfers the input to the output: (A) On the clock edge (B) Continuously (C) When input changes (D) Randomly 15. A JK flip-flop avoids the invalid state of: (A) SR flip-flop (B) D flip-flop (C) T flip-flop (D) Edge-triggered latch 16. A T flip-flop toggles its output when: (A) The input T = 1 (B) The input T = 0 (C) The input is floating (D) The clock is disabled 17. A latch is a: (A) Level-triggered storage device (B) Edge-triggered device (C) Combinational device (D) Power amplifier 18. A register is used to: (A) Store multiple bits of data (B) Decode binary input (C) Encode output signals (D) Amplify logic levels 19. A counter is a: (A) Sequential circuit that counts pulses (B) Combinational logic circuit (C) Analog measuring circuit (D) Memory-less circuit 20. The output of a combinational circuit changes: (A) Immediately when input changes (B) After a clock pulse (C) Randomly (D) Only once per cycle 21. Sequential circuits can be classified into: (A) Synchronous and Asynchronous (B) Static and Dynamic (C) Linear and Non-linear (D) Combinational and Logical 22. In synchronous circuits, all flip-flops are triggered by: (A) The same clock signal (B) Independent clocks (C) Random inputs (D) External voltage 23. In asynchronous circuits, flip-flops are triggered by: (A) Changes in input rather than a common clock (B) A common clock signal (C) Internal voltage (D) Power supply 24. The main disadvantage of asynchronous circuits is: (A) Possibility of race conditions and glitches (B) High power consumption (C) Large chip area (D) Complex layout rules 25. A state diagram is used to represent: (A) Sequential circuit behavior (B) Combinational circuit truth table (C) Power consumption (D) Noise levels 26. The finite state machine (FSM) is used to model: (A) Sequential logic circuits (B) Combinational circuits (C) Amplifiers (D) Analog filters 27. A Mealy machine produces output based on: (A) Present state and input (B) Present state only (C) Next state (D) Clock signal only 28. A Moore machine produces output based on: (A) Present state only (B) Present input only (C) Both present and next state (D) Clock frequency 29. The number of flip-flops required in a binary counter depends on: (A) Number of states to be counted (B) Clock frequency (C) Type of logic gates (D) Propagation delay 30. The main advantage of synchronous sequential circuits is: (A) Predictable timing and reliable operation (B) High noise sensitivity (C) Random output generation (D) Simpler physical layout Related Posts:Difference between single circuit heart and double circuit heartDesign and analysis of combinational circuits MCQElectronic circuit design MCQs Quizlet (Bank of Solved Questions Answers)Electronic Circuit Design – MCQsCombinational Circuits (Adders, Multiplexers) — MCQs – EECombinational Logic