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Computer Architecture and Organization Solved MCQs

1. : The processing required for a single instruction is called an

(A) Instruction processing


(B) Instruction cycle


(C) Memory instruction


(D) None of them



2. : The fetched instruction is loaded into a register in the processor known as the

(A) Memory


(B) Kernel


(C) Instruction register (IR)


(D) Memory registers



3. : The processor may perform some arithmetic or logic operation on data is

(A) Data processing


(B) Control


(C) Processor


(D) None of them



4. : The contents of the AC are stored in a location

(A) 301


(B) 302


(C) 941


(D) 303



5. : The collection of paths connecting the various modules is called

(A) Interconnections


(B) Communicating


(C) Joining


(D) Interconnection structure



6. : As with sequential access, direct access involves ——————— mechanism

(A) Read


(B) Write


(C) None


(D) Both A and B



7. : The mapping function is easily implemented using the

(A) Registers


(B) Memory


(C) Main memory address


(D) None of them



8. : The problem with write-back is that portions of the main memory are

(A) Valid


(B) Invalid


(C) Access


(D) None of them



9. : The ——————— processor can be dynamically configured to support write-through caching.

(A) Pentium 2


(B) Pentium 3


(C) Pentium 4


(D) None of them



10. : The common form of read-mostly memory

(A) EPROM


(B) EEPROM


(C) Flash memory


(D) All of these



11. : A more attractive form of read-mostly memory is

(A) EPROM


(B) EEPROM


(C) Flash memory


(D) None of them



12. : A number of chips can be grouped together to form a

(A) Main memory


(B) Memory bank


(C) Memory


(D) None of them



13. : EPROM stands for

(A) Erasable Programmable Read-Only Memory


(B) An Electrically Programmable Read-Only Memory


(C) Error Programmable Read-Only Memory


(D) None of them



14. : SDRAM stands for

(A) Static Dynamic Random Access Memory


(B) System Dynamic Random Access Memory


(C) Synchronous Dynamic Random Access Memory


(D) Syndrome Dynamic Random Access Memory



15. : There are typically hundreds of sectors per

(A) Disk


(B) Track


(C) Gaps


(D) Disk data



16. : The information can then be scanned at the same rate by rotating the disk at a fixed speed, known as

(A) Constant Angular Velocity


(B) Multiple Zone Recording


(C) Disk Data Layout


(D) None of them



17. : The ———————- byte is a special bit pattern that delimits the beginning of the field.

(A) SYNCH


(B) ID


(C) 512


(D) 600



18. : A —————– disk can be removed and replaced with another disk

(A) Nonremovable


(B) Removable


(C) Single Sided


(D) Double Sided



19. : The set of all the tracks in the same relative position on the platter is referred to as a

(A) Platter


(B) Tracks


(C) Cylinder


(D) None of them



20. : An external device attaches to the computer by a link to an

(A) Input module


(B) Output module


(C) Both A and B


(D) None of them



21. : Suitable for communicating with remote devices

(A) Communication


(B) Machine-readable


(C) Human readable


(D) None of them



22. : In how many classify external devices

(A) Communication


(B) Machine-readable


(C) Human readable


(D) All of these



23. : The user provides input through the

(A) Microphone


(B) Keyboard


(C) Monitor


(D) None of them



24. : An I/O module is often responsible for error detection and for subsequently reporting errors to the

(A) Processor


(B) Main memory


(C) RAM


(D) None of them



25. : The most important system program is the

(A) MAC


(B) Operating system


(C) Linux


(D) None of them



26. : How many layers of a Computer System

(A) One


(B) Two


(C) Three


(D) Four



27. : The access function must provide protection of resources and data from ——————- users

(A) Unauthorized


(B) Authorized


(C) End


(D) None of them



28. : How many types of errors

(A) Internal and external hardware errors


(B) Memory errors


(C) Device failure


(D) All of these



29. : Addition proceeds as if the two numbers were

(A) Integers


(B) Signed integers


(C) Unsigned integers


(D) None of them



30. : Starting at any number on the circle, we can add positive k (or subtract negative k) to that number by moving k positions ————–

(A) Clockwise


(B) Anticlockwise


(C) Counterclockwise


(D) None of them



31. : Compared with addition and subtraction, multiplication is a complex operation, whether performed in ——————————

(A) Software


(B) Hardware


(C) Both A and B


(D) None of them



32. : We have seen that addition and subtraction can be performed on numbers in twos complement notation by treating them as

(A) Integers


(B) Signed integers


(C) Unsigned integers


(D) None of them



33. : The division is somewhat more ———————– than multiplication

(A) Complex


(B) Easy


(C) Different


(D) Harder



34. : The operation is specified by a binary code, known as the

(A) Operation code or opcode


(B) Source operand reference


(C) Result operand reference


(D) None of them



35. : In most cases, the next instruction to be fetched immediately follows the

(A) Back instruction


(B) Current instruction


(C) Next instruction


(D) None of them



36. : During instruction execution, an instruction is read into an ——————– in the processor

(A) Memory buffer register (MBR)


(B) Address register (AD)


(C) Instruction register (IR)


(D) Index register (IR)



37. : These operations are performed primarily on data in

(A) Random access memory


(B) Main memory


(C) Processor registers


(D) None of them



38. : The various types of data upon which operations are performed is called

(A) Data types


(B) Operation repertoire


(C) Instruction format


(D) None of them



39. : The most common addressing techniques

(A) Stack


(B) Direct


(C) Indirect


(D) All of these



40. : Different opcodes will use different

(A) Addressing modes


(B) Mode fields


(C) Effective address


(D) None of them



41. : The disadvantage of the immediate addressing is that the size of the number is restricted to the size of the

(A) Modes


(B) Operand field


(C) Address field


(D) Registers



42. : The most common uses of displacement addressing

(A) Relative addressing


(B) Base-register addressing


(C) Indexing


(D) All of these



43. : For this addressing method, indexing is not used.

(A) Offset


(B) Preindex


(C) Postindex


(D) None of them



44. : The processor reads an instruction from memory (register, cache, main memory).

(A) Fetch instruction


(B) Fetch data


(C) Process data


(D) Interpret instruction



45. : ———————— may be used only to hold data and cannot be employed in the calculation of an operand address.

(A) Arithmetic register


(B) Data registers


(C) Index register


(D) None of them



46. : Condition code bits are collected into one or more—————-

(A) Registers


(B) Address


(C) Flags


(D) Codes



47. : Contains a word of data to be written to memory or the word most recently read is

(A) Program counter


(B) Instruction register


(C) Memory address register


(D) Memory buffer register



48. : Interpret the opcode and perform the indicated operation.

(A) Fetch


(B) Execute


(C) Interpret


(D) None of them



49. : These determine the functions to be performed by the processor and its interaction with memory.

(A) Operation performed


(B) Operands used


(C) Execution sequencing


(D) None of them



50. : The use of a large set of registers should decrease the need to access

(A) Operations


(B) Memory


(C) Register


(D) None of them



51. : A —————– is defined to be the time it takes to fetch two operands from registers, perform an ALU operation, and store the result in a register.

(A) Machine instruction


(B) Machine cycle


(C) Instruction register


(D) Register operation



52. : The stages of the pipeline are an instruction—————— and an —————— that executes the instruction

(A) Fetch


(B) Execute/memory


(C) Both A and B


(D) None of them



53. : For many years, the general trend in computer architecture and organization has been toward increasing processor complexity

(A) Instruction


(B) Addressing Modes


(C) Specialized registers


(D) All of these



 

 

Read More Computer Architecture MCQs

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  6. SET 6: Computer Architecture MCQs
  7. SET 7: Computer Architecture MCQs
  8. SET 8: Computer Architecture MCQs
  9. SET 9: Computer Architecture MCQs

 

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