VLSI Design MCQs

VLSI Design MCQs

1. ________ to form integrated circuit VLSI technology uses.

A. switches
B. transistors
C. buffers
D. diodes

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B

2. What is medium scale integration?

A. hundred logic gates
B. thousands of logic gates
C. ten logic gates
D. fifty logic gates

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A

3. To achieving high doping concentration leads to the difficulty of error…

A. in distribution error
B. in doping
C. in variation
D. in concentration

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C

4. To design VLSI, _____ architecture is used…

A. system on a chip
B. system on a circuit
C. system on a device
D. single open circuit

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A

5. The logic design of VLSI _________ is used.

A. FILO
B. LIFO
C LILO
D. FIFO

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D

6. What is the high level representation of VLSI design is ________________

A. logic design
B. problem statement
C. functional design
D. HDL program

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A

7. Which among the following is a process of transforming design entry information of the circuit into a set of logic equations?

A. Synthesis
B. Verification
C. Simulation
D. Optimization

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A

8. Which process deals with the determination of resistance & capacitance of interconnections in VLSI design?

A. Testing
B. Extraction
C. Floorplanning
D. Placement & Routing

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B

9. The net-list is generated _______ synthesizing VHDL code, in Net-list language.

A. After
B. At the time of
C. Before
D. None of these

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C

10. What type of simulation model is used to check the timing performance of a design…?

A. Transistor-level
B. Gate-level
C. Behavioral
D. Switch-level
E. None of these

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B

11. Which of the following is not a characteristic of ‘Event-driven Simulator…?

A. No event scheduling
B. Time delay calculation
C. Storage of state values
D. Identification of timing violations

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A

12. Register transfer level description specifies all of the registers in a design & ______ logic between them.

A. Identical
B. Sequential
C. Both A and B
D. Combinational
E. None of these

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D