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Computer Hardware MCQs

1. CS abbreviation stands for:

(A) Cost segment


(B) Coot segment


(C) Code segment


(D) Counter segment



2. The accumulator is 16-bit wide and is called:

(A) AH


(B) AX


(C) AL


(D) DL



3. Select the number of bits the instruction pointer is wide:

(A) 64 bit


(B) 32 bit


(C) 16 bit


(D) 128 bit



4. Select the type of addressing in memory:

(A) Physical address


(B) Logical address


(C) Both A and B


(D) None of these



5. The address of a memory is a 20-bit address for the 8086 microprocessor:

(A) Logical


(B) Physical


(C) Both


(D) None of these



6. EA abbreviation of:

(A) Electrical address


(B) Effective address


(C) Effect address


(D) None of these



7. BP abbreviation of:

(A) Base pointer


(B) Bit pointer


(C) Bus pointer


(D) Byte pointer



8. DS abbreviation of:

(A) Declare segment


(B) Direct segment


(C) Data segment


(D) Divide segment



9. Select the following which is a segment:
(E) All of these

(A) SS: Stack segment


(B) DS: Data segment


(C) CS: Code segment


(D) ES: Extra segment



10. DI abbreviation of:

(A) Defect index


(B) Destination index


(C) Definition index


(D) Delete index



11. The architecture used by the external system bus is:

(A) Pascal


(B) Von Neumann


(C) Charles Babbage


(D) Dennis Ritchie



12. Which is not a control bus signal:

(A) RESET


(B) WRITE


(C) READ


(D) None of these



13. PROM abbreviation:

(A) Programmer read and write memory


(B) Programmable read-write memory


(C) Programmable read-only memory


(D) None of these



14. EPROM abbreviation:

(A) Electrically Programmable read-write memory


(B) Erasable Programmable read-only memory


(C) Electrically Programmable read-only memory


(D) None of these



15. Select the type of microcomputer memory:

(A) Contents


(B) Address


(C) Both A and B


(D) None of these



16. Secondary memory is used to store:

(A) Compiler


(B) Program store code


(C) Operating system


(D) All of these



17. Second name of Secondary memory:

(A) Backup store


(B) Auxiliary


(C) Both A and B


(D) None of these



18. Customized ROMs are known as:

(A) EPROM


(B) Flash ROM


(C) Mask ROM


(D) None of these



19. The RAM designed through bipolar transistors is known as:

(A) Static RAM


(B) Dynamic RAM


(C) Permanent RAM


(D) DDR RAM



20. Each memory location contains:

(A) Contents


(B) Address


(C) Both A and B


(D) None of these



21. Select the type of RAM that needs regular refreshing:

(A) Permanent RAM


(B) Static RAM


(C) Dynamic RAM


(D) SD RAM



22. The RAM which is created using MOS transistors:

(A) Static RAM


(B) Dynamic RAM


(C) Permanent RAM


(D) SD RAM



23. A microprocessor repeats instructions from:

(A) Main memory


(B) Cache memory


(C) Control memory


(D) Virtual memory



24. The lower red curvy arrow shows that the CPU places the address extracted from the memory location on the:

(A) System bus


(B) Address bus


(C) Control bus


(D) Data bus



25. The CPU conveys out a ___ signal to specify that correct data is available on the data bus:

(A) Write


(B) Read


(C) Both A and B


(D) None of these



26. The CPU separates the ___ signal to complete the memory write operation:

(A) Write


(B) Read


(C) Both A and B


(D) None of these



27. BIU abbreviation stands for:

(A) Bess interface unit


(B) Bus interface unit


(C) A and B


(D) None of these



28. EU abbreviation of:

(A) Execute unit


(B) Execution unit


(C) Exchange unit


(D) None of these



29. Which is used to store an important part of data during subroutines and interrupts:

(A) Accumulator


(B) Queue


(C) Stack


(D) Data register



30. When the data in the stack is stored, it is called:

(A) Pulling


(B) Pushed


(C) Pushing data


(D) None of these



31. Select the main parts of the CPU:

(A) Control Unit and Registers


(B) Registers and Main Memory


(C) Control Unit and ALU


(D) ALU and Bus



32. Select the four categories of registers:
(E) All of these

(A) Segment registers


(B) Pointer or index registers


(C) General-purpose registers


(D) Other registers



33. Eight of the registers are called:

(A) Pointer or index registers


(B) General-purpose registers


(C) Segment registers


(D) Other registers



34. The four index registers can be used for:

(A) Multiplication operation


(B) Arithmetic operation


(C) Subtraction operation


(D) All of these



35. IP abbreviation of:

(A) Instruction paints


(B) Instruction purpose


(C) Instruction pointer


(D) None of these



36. SI abbreviation of:

(A) Source index


(B) Stand index


(C) Segment index


(D) Simple index



37. ALE abbreviation of:

(A) Address light enable


(B) Address latch enable


(C) Address lower enable


(D) Address last enable



38. NMI abbreviation of:

(A) Non mistake interrupt


(B) Non-maskable interrupt


(C) Both


(D) None of these



39. Segment containing actual assembly language instructions executed by the microprocessor:

(A) Data segment


(B) Stack segment


(C) Code segment


(D) Extra segment



40. The balance of a particular segment ranges from:

(A) 000H to FFFH


(B) 00H to FFH


(C) 0000H to FFFFH


(D) 00000H to FFFFFH



41. The pin layout of 8086 is available in:

(A) 50 pin


(B) 40 pin


(C) 30 pin


(D) 20 pin



42. DIP abbreviation of:

(A) Deal inline package


(B) Direct inline package


(C) Dual inline package


(D) Digital inline package



43. Factors of cache memory:

(A) Architecture of the microprocessor


(B) Size/organization of the cache


(C) Properties of programs being executed


(D) All of these



44. First-level memory accessed by microprocessor:

(A) Main memory


(B) Data memory


(C) Cache memory


(D) All of these



45. Small amount of high-speed memory used directly by the microprocessor:

(A) Cost


(B) Case


(C) Cache


(D) Coos



46. Cache usually gets its data from:

(A) Cache memory


(B) Case memory


(C) Main memory


(D) All of these



47. Microprocessor backing that is available in the cache is called:

(A) Cache line


(B) Cache hits


(C) Cache memory


(D) All of these



48. Microprocessor reference not available in cache is called:

(A) Cache misses


(B) Cache line


(C) Cache hits


(D) Cache memory



49. Which reason makes the microprocessor instantly stop its current activity:

(A) INTERRUPT signal


(B) RESET signal


(C) Both


(D) None of these



50. Factor responsible for outside world communication by the microprocessor:

(A) PIU


(B) BIU


(C) TIU


(D) LIU



51. INTR infers the ______ signal:

(A) INTERRUPT RIGHT


(B) INTERRUPT REQUEST


(C) INTERRUPT RONGH


(D) INTERRUPT RESET



52. Which is contained in the microprocessor:

(A) Register section


(B) Control unit


(C) One or more ALU


(D) All of these



53. The register is used to store:

(A) Memory


(B) Operands


(C) Data


(D) None of these



54. Example of accumulator-based microprocessor:

(A) Motorola 6809


(B) Intel 8085


(C) A and B


(D) None of these



55. A set of registers accommodates:

(A) Memory addresses


(B) Data


(C) Result


(D) All of these



56. First two types of registers:

(A) Dedicated register


(B) General-purpose register


(C) A and B


(D) None of these



57. Typically dedicated registers:

(A) IR


(B) PC


(C) SP


(D) All of these



58. BCD abbreviation:

(A) Binary coded decoded


(B) Binary coded decimal


(C) Both A and B


(D) None of these



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